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firstexample:first_example_microzed_sysdev

System Developer

This is the method to choose when working on new low-level drivers, kernel improvements or new FPGA configurations.

In such cases you have to control the board in by your host development system right upon a POR (power-on reset). In this mode you have full control over every every part of the hardware. However, it will take time to set everything up after booting. Notably, the FPGA configuration has to loaded through JTAG each time you load a new program.

Step by Step Instructions

  1. Set the jumpers on your MicroZed board as follows
    .
    This will boot the device from JTAG.
  2. Cycle the power. The settings of the jumpers will be read only at power-on! Hence, make sure to cycle the supply power after changing the jumper settings. A soft reset (through the JTAG or by pressing the reset button on the board will reset the board but will not sample the boot mode pins connected to the jumpers.
  3. Create a deep project and setup the project configuration as given in Hello World on the Avnet MicroZed Board. Also make sure to have OpenOCD started, see Starting OpenOCD.
  4. If you need a valid configuration in your FPGA part (e.g. you are using flink devices), you must select a configuration file for the PL.

    Available configurations can be found under https://wiki.bu.ost.ch/infoportal/embedded_systems/zynq7000/microzed.
  5. When creating the run configuration, set the target configuration to load program to ram .

How Does the System Boot?

  1. reset (by JTAG)
  2. configuration of PLL, clocks, DDR by host system
  3. download of bin-files to OCM and DDR
  4. download of bit-file (if specified)
  5. start at address 0x100
firstexample/first_example_microzed_sysdev.txt · Last modified: 2020/12/09 21:26 by ursgraf