• Use Xilinx Vivado to create a new configuration for the programmable logic part of the Zynq7000 (PL) according to https://flink-project.ch/flink_vhdl#building. Result is a bit-file, e.g. flink2.bit.
• Using Vivado, create a new Zynq7000 project following the instructions in 01_mzpz_zynq_intro_2016_4_01.pdf. Export hardware platform to SDK. We use this project solely for that SDK.
• Launch the SDK to create a simple Application, see 02_mzpz_zynq_hello_world_2016_4_01.pdf.
• Launch the SDK to create a FSBL (first stage boot loader), see 04_mzpz_fsbl_boot_2016_4_01.pdf.
• Start the Create Boot Image Tool and create new BIF file or import existing file. You have to create two different boot files

This boot files can be used for Application Development. It includes the FSBL and the PL configuration but no application. Handoff at the end of the booting stage is to JTAG.

• Add FSBL.elf created above
• Add PL configuration, e.g. flink2.bit. Make sure to include the newest version of your file.
• Output format MCS
• Create image, e.g. BOOTflink2.mcs
• Copy this file to (https://github.com/deepjava/runtime-library/tree/master/rsc)

This image file can be loaded into the QSPI flash, see https://deepjava.org/firstexample/boot_loader.

This boot files can be used for Application Development. It includes the FSBL and the PL configuration together with the hello world application. Handoff at the end of the booting stage is to this application.

• Add FSBL.elf created above
• Add PL configuration, e.g. flink2.bit
• Add hello world HelloWorld.elf created above
• Output format MCS
• Create image, e.g. BOOTflink2App.mcs
• Repeat with output format BIN
• Create image, e.g. BOOTflink2App.bin
• Copy both files to (https://github.com/deepjava/runtime-library/tree/master/rsc)

BOOTflink2App.mcs will be used when creating a deep application which is loaded into the QSPI flash for deployment, see https://deepjava.org/firstexample/first_example_microzed_deploy.