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====== Application Development ======
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This is the preferred method when writing applications on the MicroZed board using the existing runtime library together with the board support package.  
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While you can load and test new custom applications quickly, the configuration of the FPGA is loaded from the QSPI flash. This saves time compared to using the method [[first_example_microzed_sysdev|System Developer]]. 
 
===== Step by Step Instructions =====
  - Make sure that you have a suitable boot loader in your QSPI flash, see [[boot_loader| Boot Loader]]. This must be done only once as long as you don't overwrite it. 
  - Set the jumpers on your MicroZed board as follows \\ {{ qspiboot.png?200 |}}. \\ This will boot the device from the QSPI flash. 
  - Cycle the power. The settings of the jumpers will be read only at power-on! Hence, make sure to cycle the supply power after changing the jumper settings. A soft reset (through the JTAG or by pressing the reset button on the board will reset the board but will not sample the boot mode pins connected to the jumpers.
  - Create a deep project and setup the project configuration as given in [[first_example_microzed|Hello World on the Avnet MicroZed Board]]. Make sure that you have set the OpenOCD command and command options so that it suits your installation, please refer to [[eclipse:perspective#Setting_Deep_Preferences|Setting Deep Preferences]].
  - Do not specify a configuration for the FPGA part, as it will be loaded from flash. \\ {{ choosenoplfile.png?350 |}}.
  - When creating the run configuration, set the target configuration to //boot from flash memory and load program to ram// {{ runconfigurationmicrozedflashram.png?400 |}}.
  - //Run// will compile, link and download the image file. See [[firstexample:first_example_microzed|Hello World on the Avnet MicroZed Board]] for guidance about necessary installations and properly connecting the target.
===== How Does the System Boot? =====
  - reset (by JTAG)
  - load and run first stage boot loader from flash
    - configuration of PLL, clocks, DDR
    - load PL
    - handoff to JTAG
  - halt
  - reset REBOOT_STATUS register
  - download of bin-files to OCM and DDR
  - download of bit-file (if specified)
  - start at address 0x100
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