first_example_microzed_sysdev
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| first_example_microzed_sysdev [2020/12/01 08:05] – ursgraf | first_example_microzed_sysdev [2020/12/01 10:56] – [How does the System Boot?] ursgraf | ||
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| In such cases you have to control the board in by your host development system right upon a POR (power-on reset). In this mode you have full control over every every part of the hardware. However, it will take time to set everything up after booting. Notably, the FPGA configuration has to loaded through JTAG each time you load a new program. \\ | In such cases you have to control the board in by your host development system right upon a POR (power-on reset). In this mode you have full control over every every part of the hardware. However, it will take time to set everything up after booting. Notably, the FPGA configuration has to loaded through JTAG each time you load a new program. \\ | ||
| - | For this you have to set the jumpers on your MicroZed board as follows \\ {{ : | ||
| ===== Step by Step Instructions ===== | ===== Step by Step Instructions ===== | ||
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| - Cycle the power. The settings of the jumpers will be read only at power-on! Hence, make sure to cycle the supply power after changing the jumper settings. A soft reset (through the JTAG or by pressing the reset button on the board will reset the board but will not sample the boot mode pins connected to the jumpers. | - Cycle the power. The settings of the jumpers will be read only at power-on! Hence, make sure to cycle the supply power after changing the jumper settings. A soft reset (through the JTAG or by pressing the reset button on the board will reset the board but will not sample the boot mode pins connected to the jumpers. | ||
| - Create a deep project and setup the project configuration as given in [[first_example_microzed|Hello World on the Avnet MicroZed Board]]. | - Create a deep project and setup the project configuration as given in [[first_example_microzed|Hello World on the Avnet MicroZed Board]]. | ||
| - | - If you need a valid configuration in your FPGA part (e.g. you are using flink devices), you must select a configuration file for the PL. | + | - If you need a valid configuration in your FPGA part (e.g. you are using flink devices), you must select a configuration file for the PL. \\ {{ :: |
| + | - When creating the run configuration, | ||
| + | |||
| + | ===== How Does the System Boot? ===== | ||
| + | - reset (by JTAG) | ||
| + | - configuration of PLL, clocks, DDR by host system | ||
| + | - download of bin-files to OCM and DDR | ||
| + | - download of bit-file (if specified) | ||
| + | - start at address 0x100 | ||
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