https://deepjava.org/ 2026-04-28T01:14:03+00:00 https://deepjava.org/ https://deepjava.org/lib/tpl/deepjava-tpl/images/favicon.ico text/html 2022-12-20T11:34:58+00:00 Anonymous (anonymous@undisclosed.example.com) https://deepjava.org/dev/crosscompiler/backend_arm/code_generator?rev=1671532498&do=diff Code Generator for ARM All results of all SSA instructions have an assigned register. Now, each SSA instruction can be translated into one or a sequence of machine instructions. In order to do this, we must define the stackframe, which is used when calling a method. text/html 2019-11-17T18:24:04+00:00 Anonymous (anonymous@undisclosed.example.com) https://deepjava.org/dev/crosscompiler/backend_arm/exceptions?rev=1574011444&do=diff Exceptions Terminology * ARM Exception: Exception which are specific to the ARM architecture. * Interrupt: A certain type of a ARM exception, caused by asynchronous events by external hardware. * Java Exception: Exception defined in the Java language specification. All Java exceptions are extensions of the class text/html 2019-10-03T10:22:35+00:00 Anonymous (anonymous@undisclosed.example.com) https://deepjava.org/dev/crosscompiler/backend_arm/register_allocation?rev=1570090955&do=diff Register Allocation The ARM architecture offers 16 GPRs. Depending on the implemented VFP version a certain number of floating point registers (extension registers) are present. The figure below assumes 32 EXTRs with 64 bit each. The first 16 EXTRs are interleaved with 32 EXTRs with 32 bit precision. text/html 2018-10-31T13:59:52+00:00 Anonymous (anonymous@undisclosed.example.com) https://deepjava.org/dev/crosscompiler/backend_arm/start?rev=1540990792&do=diff Backend for ARM Architecture The backend of the compiler is platform specific. The links below describe the implementation for the ARM architecture. Components, platform dependent * Register Allocation * Code Generator * Exceptions