dev:start
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| dev:start [2017/03/20 09:58] – sfink | dev:start [2022/12/20 11:30] (current) – ursgraf | ||
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| <WRAP half column 58%> | <WRAP half column 58%> | ||
| ====== Project deep ====== | ====== Project deep ====== | ||
| - | Under the name of **deep** a new cross development platform for Java was created. The project was initiated and is maintained by the Institut for Computer Science at the Fachhochschule für Technik, NTB, Buchs, Switzerland. | + | Under the name of **deep** a cross development platform for Java was created. The project was initiated and is maintained by the Institut for Computer Science at the Eastern Switzerland University of Applied Sciences, OST, Buchs, Switzerland. |
| ===== Goals ===== | ===== Goals ===== | ||
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| * [[.: | * [[.: | ||
| * [[.: | * [[.: | ||
| + | * [[openocd: | ||
| + | * [[.: | ||
| </ | </ | ||
| </ | </ | ||
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| ===== Crosscompiler ===== | ===== Crosscompiler ===== | ||
| - | Our **deep** compiler translates Bytecode into machine code for a certain processor. To optimize for speed and code size and to make use of register based architecture - such as PPC - we transform the Bytecode in a first step into [[.: | + | Our **deep** compiler translates Bytecode into machine code for a certain processor. To optimize for speed and code size and to make use of register based architecture - such as PPC or ARM - we transform the Bytecode in a first step into [[.: |
| ==== Frontend ==== | ==== Frontend ==== | ||
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| ==== Backend ==== | ==== Backend ==== | ||
| For each supported architecture a specific backend is necessary. As a first step, registers are assigned for all SSA instruction results. After this machine instructions can be issued for the target. Finally the linker combines everything into a executable target image.\\ | For each supported architecture a specific backend is necessary. As a first step, registers are assigned for all SSA instruction results. After this machine instructions can be issued for the target. Finally the linker combines everything into a executable target image.\\ | ||
| - | Currently, PowerPC code can be generated. As target processors we use mpc555 and mpc5200. | + | Currently, PowerPC |
| ===== Further Components ===== | ===== Further Components ===== | ||
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| ---- | ---- | ||
| ==== Internal Developer Documentation ==== | ==== Internal Developer Documentation ==== | ||
| - | The internal documentation for maintainers can be found [[http:// | + | The internal documentation for maintainers can be found [[http:// |
dev/start.1490000299.txt.gz · Last modified: 2017/03/20 09:58 by sfink
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